1. Field of the Invention
The present invention relates to a semiconductor integrated circuit having an optical waveguide layer.
2. Description of the Related Art
The semiconductor integrated circuit in recent years has a tendency to further enlarge a circuit size mounted on a chip for obtaining multi-functions, and as a result, the chip area keeps increasing. With this, for instance, at the respective portions on the chip, it becomes difficult to match arrival time of a clock, that is, to match phases.
Accordingly, an idea of transmitting signals such as clock or data with a light has been proposed, and investigation is now proceeding.
One of the techniques to transmit signals with light uses a line-shaped optical waveguide path. However, in this case, since it is not possible to make width of the optical waveguide path smaller than wavelength of the light, there is a problem that it is difficult to form the optical waveguide path minutely in accordance with miniaturization of elements.
Further, another technique to transmit signals with light is to transmit the signals using an optical waveguide surface (for instance, Jpn. Pat. Appln. KOKAI Publication No. 2001-237411).
Using the optical waveguide surface can solve the problems occurring in the optical waveguide path. However, since the speed of light is not infinite, like the case of electrical signals, when distances from the light source to respective portions on the chip differ, it becomes difficult to match arrival times of the signals at respective portions on the chip.
Further, even though the signal is transmitted with light, elements receiving the signal necessitate photoelectric conversion element operating by electricity, and further necessitate local conductive wire to lead the signal converted to the electricity from the light to the element. For this reason, chip layout is complicated, and chip area increases.
Therefore, in order to more practically realize the technique for transmitting the signals by the optical waveguide surface, new technical development to substantially reduce timing skew of the signals at respective portions on the chip is essential.